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Autre Publication Scientifique Année : 2004

Cycle Accurate Simulation Model Generation for SoC Prototyping

Résumé

We present new results concerning the integration of high level designed ips into a complete System on Chip. We first introduce a new compu- tation model that can be used for cycle accurate simulation of register transfer level synthesized hardware. Then we provide simulation of a SoC integrating a data-flow ip synthesized with MMAlpha and the So- cLib cycle accurate simulation environment. This integration also vali- dates an efficient generic interface mechanism for data-flow ips.
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Dates et versions

hal-00399647 , version 1 (27-06-2009)

Identifiants

  • HAL Id : hal-00399647 , version 1

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Antoine Fraboulet, Tanguy Risset, Antoine Scherrer. Cycle Accurate Simulation Model Generation for SoC Prototyping. 2004. ⟨hal-00399647⟩
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